
32 Mbit Multi-Purpose Flash Plus
SST39VF3201B / SST39VF3202B
Data Sheet
TOP VIEW (balls facing down)
6
A13 A12 A14
A15 A16 NC DQ15 VSS
5
A9
A8
A10
A11 DQ7 DQ14 DQ13 DQ6
4
WE# RST#
NC
A19 DQ5 DQ12 VDD DQ4
3
NC WP# A18
A20 DQ2 DQ10 DQ11 DQ3
2
1
A7
A3
A17
A4
A6
A2
A5
A1
DQ0 DQ8 DQ9 DQ1
A0 CE# OE# VSS
A B C D E F G H
1384 4-tfbga B1K P2.0
FIGURE 3: pin assignments for 48-ball TFBGA
TABLE 4: Pin Description
Symbol
A MS1 -A 0
DQ 15 -DQ 0
WP#
RST#
CE#
OE#
WE#
V DD
V SS
NC
Pin Name
Address Inputs
Data Input/output
Write Protect
Reset
Chip Enable
Output Enable
Write Enable
Power Supply
Ground
No Connection
Functions
To provide memory addresses.
During Sector-Erase A MS -A 11 address lines will select the sector.
During Block-Erase A MS -A 15 address lines will select the block.
To output data during Read cycles and receive input data during Write cycles.
Data is internally latched during a Write cycle.
The outputs are in tri-state when OE# or CE# is high.
To protect the top/bottom boot block from Erase/Program operation when grounded.
To reset and return the device to Read mode.
To activate the device when CE# is low.
To gate the data output buffers.
To control the Write operations.
To provide power supply voltage: 2.7-3.6V
Unconnected pins.
T4.0 1384
1. A MS = Most significant address
A MS = A 20 for SST39VF320xB
?2009 Silicon Storage Technology, Inc.
7
S71384-01-000
1/09